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The output to your micro-controller /Ardunino is serial
When the door opens this distance increases
When CE is LOW internal state changes are initiated synchronously bythe LOW-to-HIGH transition of the clock input
Once we have the x/y movements we can integrate these values over time with the current yaw to arrive at an estimate of position
Tolerance:
74HC195 ( 4-bit parallel access shift register) PT100/PT1000 RTD The output to your micro-controllerIntroduction : 74HC195 is a high speed 4 bit SHIFTREGISTER utilizes advanced silicon gate CMOS technolo gy to achieve the low power consumption and high noiseimmunity of standard CMOS integrated circuits, along withthe ability to drive 10 LS TTL loads at LS type speeds. This shift register features parallel inputs, parallel outputs, J Kserial inputs, SHIFT LOAD control input, and a directoverriding CLEAR. This shift register can operate in twomodes:
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